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This standard provides a framework for introducing nanoelectronics into large scale, high volume production in semiconductor manufacturing facilities through the incorporation of nanomaterials (e. g. CNT, graphene, quantum dots, etc.) (fabs). Since semiconductor fabs must incorporate practices that maintain high yields, there are very strict requirements for how manufacturing is performed. Nanomaterials represent a potential contaminant in semiconductor fabs, and must be introduced in a structured and methodical way. This standard suggests generic steps that might be employed to facilitate the introduction of nanomaterials into the fabs. This sequence is described below under the areas of Raw Materials Acquisition, Materials Processing, Design, IC Fabrication, Testing, and End-Use. These activities represent the major stages of the supply chain in a fab.
| Author | DIN |
|---|---|
| Editor | DIN |
| Document type | Draft |
| Format | File |
| expiration_de_validite | 2013-10-30 |
| ICS | 07.120 : Nanotechnologies
|
| Number of pages | 21 |
| Cross references | IEC 113/171/CD (2012-11), IDT |
| Year | 2013 |
| Document history | |
| Country | Germany |
| Keyword | 62659 |